Generally, silicide interconnects are formed by electroless deposition of metals such as nickel on suitable silicon substrates followed by subsequent heat treatment to form the metal silicide. This heat treatment is conventionally referred to as rapid thermal annealing (RTA). Typically, this heat treatment requires a substrate to be submitted to elevated temperatures ranging from 300 to 750° C. whereby the metal diffuses into the silicon substrate upon formation of the metal silicide. For a metal to be deposited on silicon substrates the latter need to be activated. This is especially the case for p-doped polysilicon. n-doped substrates can be directly plated with strongly alkaline electroless nickel plating baths. However, strongly alkaline media may damage substrates used in the manufacturing of semiconductors such as solder masks. Hence, the use of strongly alkaline plating baths is not desired in the art. Therefore, it is a common technique to activate silicon substrates with compositions comprising palladium ions and hydrofluoric acid or other sources of fluoride ions as disclosed in GB 976,656. A possible mechanism for this kind of activation is disclosed in U.S. Pat. No. 4,297,393.
U.S. Pat. No. 6,406,743 B1 relates to nickel-silicide formation on polysilicon interconnects. The method disclosed therein teaches the use of a solution containing palladium salts and high concentrations of hydrofluoric acid and acetic acid as activation composition for polysilicon prior to nickel or nickel alloy deposition. Regardless of the high toxicity associated with the use of such concentrated hydrofluoric acid solution, the use of such composition results in very coarse palladium seeds to be obtained. In order to provide uniform nickel silicide coverages on such coarse palladium seeds, it is required to provide a thick nickel deposit thereon which in turn leads to too big structures to be used in modern semiconductor technology (see examples 1 and 2).
U.S. Pat. No. 5,753,304 reports an activation solution which is particularly useful for aluminium surfaces. Said activation solution comprises inter alia palladium salts, alkali metal fluoride or hydrogen fluoride, and carboxylic acids as complexing agents. Said carboxylic acids are employed in quantities of approximately 10 to 100 ml/l of activation solution.
US 2005/0161338 A1 discloses a method of activating silicon surfaces with aqueous solutions comprising a source of palladium and at least one acid. Useful acids in the disclosure are manifold such as mineral acids like sulphuric acid, nitric acid and hydrochloric acid, or organosulphuric acids such as methanesulphuric acid or aromatic sulphonic acids such as para-toluenesulphonic acid. The use of one aliphatic or aromatic acid, however, results in too inhomogeneous coverages of treated surfaces (see examples 2 to 4).
WO 2014/128420 discloses the use of a composition comprising an anionic or non-ionic surfactant, gold ions and fluoride ions for the activation of semiconductor substrates. The employment of a surfactant improves the results and allows for thinner nickel layers to be formed. According to this disclosure a composition containing palladium and fluoride ions results in a non-uniform deposition and diffusion of the subsequent nickel layer on and into the substrate (pages 2, 14 and 15 and table 1, entry 1). The use of gold ions is undesired in the manufacture of electronic devices for several reasons such as costs.
Although these methods are capable of providing a method for the activation of silicon substrates and a subsequent nickel silicide formation, they do not fulfil the requirements of modern semiconductor manufacturing. The seed layers of the noble metals employed are too coarse and the distribution of the individual seeds on the surface of the silicon substrate is not homogeneous enough with the result that too thick nickel layers have to be deposited on the substrate. Furthermore, if the noble metal distribution is too coarse, the individual noble metal particles are also bigger leading to increased cost due to the high price of noble metals in general. Even more importantly, the metal or metal layers on silicon substrates are required to be very thin and homogeneous in height. Thus, they need to be levelled and smooth. A prerequisite therefor is that the underlying palladium seed layers are very homogeneous and the substantially free of big aggregated particles. It is particularly disadvantageous if palladium seeds are as big as the desired metal or metal alloy layer to be formed thereon (or even bigger). The metal or metal alloy layer formed thereupon will otherwise form on those big particles and a very rough (giving structures like valleys and hills) surface will be formed requiring a polishing step, especially if metal or metal alloy layers in the range of 5, 10, 20 or 50 nm are to be formed. This is incompatible with the ongoing miniaturization and cost and environmental awareness in the semiconductor manufacturing industry.